Is it legal to execute SVC from EL1 in ARMv8?
I have two cores in the same A53, and both are configured the same way with respect to system registers and MMU. When executing SVC #1 from EL1(S), one of the cores correctly generates syndrome 0x56000001 in ESR_EL1 (EC 0b01010101: "SVC instruction execution in AArch64 state"), but the other core generates syndrome 0x02000000 (EC 0b000000: "reason unknown").
You might need to check whether HFGITR_EL2_SVC_EL1 and SCR_EL3.FGTEn setting is the same.
Thank you for the suggestion, but it appears to me that HFGITR_EL2 is only available with FEAT_FGT, which my processor does not support.
To confirm whether the SVC instruction causes the exception EC 0b000000: "reason unknown", did you perform step by step debugging?
It does support SVC at EL1, see the pseudo code in arm arm
aarch64/exceptions/syscalls/AArch64.CallSupervisor// AArch64.CallSupervisor()// ========================// Calls the SupervisorAArch64.CallSupervisor(bits(16) immediate)if UsingAArch32() then AArch32.ITAdvance();SSAdvance();route_to_el2 = PSTATE.EL == EL0 && EL2Enabled() && HCR_EL2.TGE == '1';bits(64) preferred_exception_return = NextInstrAddr();vect_offset = 0x0;exception = ExceptionSyndrome(Exception_SupervisorCall);exception.syndrome<15:0> = immediate;if UInt(PSTATE.EL) > UInt(EL1) thenAArch64.TakeException(PSTATE.EL, exception, preferred_exception_return, vect_offset);elsif route_to_el2 thenAArch64.TakeException(EL2, exception, preferred_exception_return, vect_offset);elseAArch64.TakeException(EL1, exception, preferred_exception_return, vect_offset);
SVC is not supported at EL2, EL3.
Yes, I did single step through the code. As soon as I execute the SVC instruction, I find myself at the current level sync SPx exception vector, and the ESR is 0x02000000. As I explained to 42Bastian Schick, I suspect that the 0x02000000 is the syndrome of some higher priority exception, and I suspect that my debugger is to blame.
Thank you for referencing the pseudocode. I'll mark this as an answer. But in response to your comment that "SVC is not supported at EL2, EL3," the pseudocode makes it fairly clear that the exception would be taken at the current PSTATE.EL. It couldn't be processed at EL1, but it would be available for higher-level processing if that was desirable.
"SVC is not supported at EL2, EL3" really means that SVC would not be used as system call function.
>I suspect that the 0x02000000 is the syndrome of some higher priority exception, and I suspect that my debugger is to blame
You could verify it by not using debugger and print out the ESR in the handler, to check whether the debugger should be blamed.
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