Taking exceptions from EL1 to EL1: Problems with SVC

Is it legal to execute SVC from EL1 in ARMv8?

I have two cores in the same A53, and both are configured the same way with respect to system registers and MMU.  When executing SVC #1 from EL1(S), one of the cores correctly generates syndrome 0x56000001 in ESR_EL1 (EC 0b01010101: "SVC instruction execution in AArch64 state"), but the other core generates syndrome 0x02000000 (EC 0b000000: "reason unknown").

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