A simple bare-metal GICv3 in AArch64?

Hello, 

this is my first port in absolute in the forum, and I am a beginner in ARM developing.

I did read the ARM GICv3-v4 overview and the ARM GICv3-v4 software overview, together with the 900pages Generic Interrupt Controller
Architecture Specification v3-4.

However, I have plenty of difficulties in implementing a simple project from scratch: 

1- A gicv3

+

2- A simple timer which assert a IRQ each second.

Basically, the reading that I gave you doesn't give me a starting point/an example. 

The only example I have is this one: https://github.com/NienfengYao/armv8-bare-metal but it is a GICv2! I am trying to convert it in GICv3 but I am failing to capture the IRQ..... this example runs in QEMU, virt, aarch64, cortexA-57.

Basically, I have some questions:

1- Do you have a coding example of a gicv3 I can use as a reference? The guides are not enough for me.... 

2- The Git example with GICv2 does not configure the redistributor.... only GICC and GICD, but not GICR. Is it normal?

3- In my process of conversion from GICv2 to GICv3, I have to write the code to enable the IRQs. So I set the REG_GIC_GICD_ISENABLER register for each IRQ number and I set the bit 0 of GIC_GICC_IGRPEN1_EL1 register. Do I miss something? I can't find nowhere a tutorial "how to enable IRQs in GICv3"....

Thanks for your help

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