Hi All
1) is there any affordable SBC that could provide EOR3/RAX1/XAR/BCAX instructions?
2) My understanding is it is available on Cortex A75. so which most affordable hardware can be leverage for testing?
thanks a lot
Checkout also Cortex-A55. A little googling will help.
hey, I though Cortex 55 would do it as it is ARM 8.2A while i can't find these in the doc https://developer.arm.com/documentation/epm128372/2-0/ ? I will test on a Odroid C4 (Cortex A55) in the next weeks but i fell it is unlikely it will do it according that doc right?
May we have an answer from ARM to question 1?. Cheapest options are preferred. Thanks
From the doc:
The Cortex-A55 core is a mid-range, low-power core that implements the Armv8-A architecture with support for the Armv8.1-A extension, the Armv8.2-A extension, the RAS extension, the Load acquire (LDAPR) instructions introduced in the Armv8.3-A extension, and the Dot Product instructions introduced in the Armv8.4-A extension.
i can read this in the introduction but what is your conclusion? my understanding is that the specific instructions in question 1 are not available in Cortex 55. did you now came to that evidence too?
So i am still asking to the ARM SME on which Cortex & SBC i could find the EOR3/RAX1/XAR/BCAX instructions?
If you cannot believe the docs, get a SBC with CA55, and try the opcode.
I don't know what to do with your answers. But for the thread I dig into the ARM extensions and realised that the instructions have been added to ARM 8.4 A.
It is specified that the ARM V8.x should only contain V8.x+1 extensions and must not contain V8.x+2[1]. In substance Cortex A55 and A75 are ARM 8.2. How ever, I can see also from the C55 leaflets and the doc mentioned up[2] that the C55 is having extensions from V8.4 which is a breaking rule from [1] "
"An Armv8.x-A processor can implement any features from the next .x extension. However, it cannot implement features from any .x extension after that."
Personally, I like upgrade or promotions +)
So, can an ARM SME help me on question 1. I would like to understand where I can test these instructions called FEAT_SHA3. Thanks a lot.
Just receive the C55 but i feel like it will fail.
[1] https://developer.arm.com/architectures/learn-the-architecture/understanding-the-armv8-x-extensions/single-page
[2] https://developer.arm.com/documentation/epm128372/2-0/
:-) It seems ARM does not follow its rules.According [1] and the CA55 manual, it is a full 8.2 implementation and is allowed to implement partially 8.3 ISA but _not_ 8.4.So according [1], if it includes 8.4 it must be a full 8.3 implementation.
But, I would not wait for an "official" ARM statement in the forum. At least, I never saw one in all the years.
Also from CA55 manual:B2.58 ID_AA64ISAR0_EL1, AArch64 Instruction Set Attribute Register 0, EL1The ID_AA64ISAR0_EL1 provides information about the instructions implemented in AArch64 state,including the instructions that are provided by the Cryptographic Extension.Bit field descriptionsID_AA64ISAR0_EL1 is a 64-bit register, and is part of the Identification registers functional group.This register is Read Only.The optional Cryptographic Extension is not included in the base product of the core. Arm requireslicensees to have contractual rights to obtain the Cryptographic Extension.
To me it means, you need to look at the SoC, to know if or if not the FEAT_SHA3 is implemented or not.
So, for the clarity of the thread and as a conclusion for question 1
I can confirm Cortex A55 (ARM 8-2) do not implement SHA3. it does implement AES and SHA-2 only.
I fell only ARM 8.4 will implement as it is becoming mandatory. I suspect only Apple do and no other implementation have been done.
We may find this feature on ARM 8.3 processor but i can't find any.
Regards
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