I'm new to the AXI ecosystem.
However, I have one question related to unaligned read transfers.
Does AXI4 support unaligned read transfers although er are no strobe lines?
If so, which data on the bus is written?
To make it easier, discuss it on the following example:
We have a memory with address 0 to 8 with the following content:
I have a bus width of 32 bit, a burst size of 32 bit, a burst length of 1. If I read from address 0x1,
which data does the host get? Does it get the 0x44332211?
Applying a burst length of 2 to the same example. Would this then return: 0x44332211 0x88776655?
View all questions in Cortex-A / A-Profile forum