Cortex A-35 prevent fetch code allocation in cache


I'm currently working on the i.MX8QX which contains a cluster of 4 A-35 cores. From my understanding, it is possible to prevent data cache allocation using the write or read allocate. From:

The cache policies enable us to describe when a line should be allocated to the data cache and what should happen when a store instruction is executed that hits in the data cache.

The cache allocation policies are:

Write allocation (WA)

A cache line is allocated on a write miss. This means that executing a store instruction on the processor might cause a burst read to occur. There is a linefill to obtain the data for the cache line, before the write is performed. The cache contains the whole line, which is its smallest loadable unit, even if you are only writing to a single byte within the line.

Read allocation (RA)

A cache line is allocated on a read miss

Is there a similar parameter to prevent allocation in the instruction cache from fetch code ? 

Kind Regards,


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