ID issue

 If two AXI masters are sending transactions with same ID, how to send response correctly to the respective masters

  • If two masters have the same ID I'd consider it an design error.

  • This could quite easily happen in a system which includes two identical CPUs, but equally could happen if two masters just happen to use a particular ID encoding.

    However you'll need an AXI interconnect between those masters and the system's slaves, and it is this interconnect that will "uniquify" the IDs presented to the slaves, usually by adding extra bits ot the IDs seen by the slaves.

    These additional ID bits tell the interconnect which master the transaction originated from, and so tells the interconnect where to return the slave responses.

    Slaves therefore need to have a configurable ID width so that they can be used with any complexity system (the larger the interconnect, the larger the number of added ID bits). The slaves don't need to know which ID bits are the bits from the master, and which are interconnect added bits, they simply see a unique range of IDs for each physical master.

    So at the slaves, if the IDs are identical for two transactions, they came from the same source.

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