Hi,
The ARMv8A architecture profile shared an example of using WFE in the implementation of spinlock. I'd like to know how long it might take for Cortex A53 to exit from lower power state. If it is too long, I may prefer just using a tight loop in my spinlock implementation. My SoC has a few Cortex A53 clusters, and the performance is critical.
Thanks
-Oscar
The time to exit WFE is SoC dependent. WFE is just a hint to the sub-system. So you need to measure it.