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Resetting GIC by SW?

Hello,

we have a board using Armada 3720 SOC, which contains two Cortex-A53s and one Cortex-M3 used as secure-coprocessor. The interrupt controller is GIC-500.

The M3 has access to all registers that A53 can see. The first A53 has RVBAR at 0xffff0000 where there is a simple BootROM. The second A53 has configurable RVBAR via a register. Booting the second A53 is implemented in arm-trusted-firmware for this platform. The platform also has a CPU_SOFTWARE_RESET register which resets the first A53.

The SOC contains a special RESET register which resets the entire SOC, but for some reason it sometimes doesn't work correctly on some of our boards (it may be a HW bug, we do not know yet). It is unpredictable if the RESET register will reset the SOC or leave it in an unusable state.

I am therefore trying to implement a reset via the secure firmware running on the Cortex-M3. Since the M3 has access to all registers, I can put all peripherals into reset. But AFAIK there is no way to fully reset the GIC via software (the SOC does not have GIC reset ping (if such thing exists) routed to a memory mapped register).

So what I am trying to do in the M3 secure processor is:

  1. reset first A53 into BootROM
  2. put second A53 into reset
  3. reset all peripherals
  4. reset GIC by writing to the memory mapped register
  5. load arm-trusted-firmware and u-boot from SPI
  6. kick first A53 to jump onto arm-trusted-firmware

The problem is that after resetting the A53's the GIC is sometimes somehow stuck. If some change is done to the GICD_CTLR register, the RWP bit is high and when arm-trusted-firmware tries to configure it, it waits for RWP to become low, and this never happens.

The curious thing is that this does not happen always. Sometimes if I do this SW reset (the main CPU is running Linux), it boots without issue afterward. But sometimes things get stuck.

I tried to write to the GIC registers from M3, and also from both A53's, but if the GIC gets stuck in this way, it does not matter if both A53's are running, the RWP bit reports that GICD changes have not been propagated.

Any ideas what I might try doing?

Should I put both A53's in EL1 and do something from there?

Thank you.