Hello,
Is there any data regarding the minimum and maximum frequency a processor can operate in ARM V-7 ?
Wouldn't that be up to the individual SoC designers and manufacturers? I believe the ARM IP uses static logic so there's no built in minimum frequency which makes it easier to adapt, but other designs may use dynamic logic as in DRAMS as it can sometimes save on logic or give extra speed.
From an article on the Cortex-A8 design (emphasis mine):
Finally, a few of the most critical timing and area sensitive blocks of the design are reserved for full custom techniques. This includes memory arrays, register files and scoreboards. These blocks contain a mix of static and dynamic logic. No self-timed circuits are used.
That's mostly an implementation choice - the first Cortex-A8 implementations used some semi-custom layout and cells to improve performance - but the synthesis tools and standard libraries soon caught up, so there is also a fully synthesized version which is commonly used today.
HTH, Pete
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