I'm researching the the <Arm Architecture Reference Mannual ARMv7-A ARMv7-R edition> these days. when i read about the exception handling part of this mannual,it come accross a confussion to me,the problem is how to dicide the instruction address to which the exception should return back.
here is the method mentioned in the document:
Suppose that the processor is excuting an instrction at 0x_0000_1000 and an IRQ was taken to IRQ mode
according to the document, we can get the return information of this exception as follows:
1)Preferred return address : Address of next instruction to execute(in this case is 0x_0000_1002 for thumb instruction set state and 0x_0000_1004 for arm instruction set state).
2)LR : preferred return address plus an offset that depends on the instruction set state when the exception was taken(in this case LR = 0x_0000_1002 + 4 for thumb instruction set and 0x_0000_1004 + 4 for arm instruction state),so LR = 0x_0000_1006 for thumb instruction set state and LR = 0x_0000_1008 for arm instruction set state.
3)PC : in this case PC = 0x_0000_1000 + 4 for thumb instruction set state and PC = 0x_0000_1000 + 8 for thumb instruction set state.
4)the document gives a Pseudocode to calculate the LR by using the parameter PC
LR = PC - 0, in thumb instruction set state. in this case is LR = 0x_0000_1004 - 0 = 0x_0000_1004
LR = PC - 4, in arm instruction set state. In this cse LR = 0x_0000_1008 - 4 = 0x_0000_1004
Here we can see that we can get a dirrent LR by the means of 2) and 4),what's going wrong with my calculation?which method is right?and how to calculate the final return address ? by the way,my english is so poor,shamed,hope u can understand what i'm trying to express...
Just take (2): Substract 4 (or 8 in case of virtual/data abort) from the LR to get the return address.
thanks, but how about (4), is there anything wrong with this method or anyting I misunderstand with this method?
(4) Shows what the core does. Not what your SW should do.
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