I need the MIPS and flops of cortex a53 processor. The results which I saw on wikipedia were in DMIPS. But i need it in MIPS only.
The MIPS indicator is less and less used on recent processors.
In the best case, the Cortex-a53 is able to issue two instructions each cycle.
Multiplied by the (maximum) frequency, this gives you an upper bound in term of MIPS.
But then you might want to measure a specific program, running on a specific chip to obtain a more detailed MIPS figure.
Tools like Linux perf can measure the actual cycles and instructions per seconds.
thk you , and how about flops of cortex-a53
Like MIPS, actual FLOPS will depend on many factors.
Note that most Cortex-A53 support NEON, which can perform floating point operations in SIMD and give your application a performance increase compared to scalar.
how many floating point operations in a cycle by core a53? do you have this data? i only need the core a53 flops, do not need the neon performance.
AFAIK Arm does not publish those informations for Cortex-A53.
Others in the community have done measurements, which might help.
Also, Arm has published the optimization guide for Cortex-A55, which might give indications on an upper bound for Cortex-A53.
View all questions in Cortex-A / A-Profile forum