i wang to get cpu run state aarch64 or aarch32? is there ang regisister can ?cpu is cortex a57 series
PSTATE.nRW is 0 when running in 64b, and 1 when running in 32b.
This is also available to a debugger in DSPSR_EL0.M.
i have seen this,but how to access this register，i can not find a Valid assembly instructions.
When taking an exception, the processor state is stored in the relevant Saved Program StatusRegister (SPSR), in a similar way to the CPSR in ARMv7. The SPSR holds the value of PSTATEbefore taking an exception and is used to restore the value of PSTATE when executing anexception return.
by this i can read spsr,but when switch from el3 to el2 ,pstate is save to spsr_el3, i can not access spsr_el3 when i in el2.
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