Can anyone help?
I believe the event you are looking for is "SWINCR". This is a count of "Architecturally executed instructions." See ARM ARM C.12.8 for more details of what this count actually relates to.
Hope this helps.
Chris
The SW_INCR event only counts writes to the PMSWINCR register, not all architecturally executed instructions.
For Cortex-A9, there is no PMU event that counts the architecturally executed instructions. The closest available event is 0x68 as described by song846079 below.
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