Given a multiprocessor system, how are the PC values of secondary cores set from the primary core? I've read lots of threads stating it can be done but without any details. I could not find anything in the ARMv8 reference manual.
One might contrive a mailbox system where the secondary cores wfe and check the value of a mailbox address when woken up. But is there a supported method to directly write the secondary core PC before waking it up? What are the various methods for "waking up" a core?
Hi 42Bastian Schick,
In my case I see qemu emulates PSCI called with HVC.
You can ask qemu to dump the dtb with:
qemu-system-aarch64 -machine virt,dumpdtb=dump.dtb -smp 4 ...
Then you can "disassemble" the dtb with:
dtc -o dump.dts -I dtb -O dts --sort dump.dtb
You will see the cpu nodes in there referring to PSCI:
cpus { #address-cells = <0x01>; #size-cells = <0x00>; cpu@0 { compatible = "arm,cortex-a72"; device_type = "cpu"; enable-method = "psci"; reg = <0x00>; }; cpu@1 { compatible = "arm,cortex-a72"; device_type = "cpu"; enable-method = "psci"; reg = <0x01>; }; cpu@2 { compatible = "arm,cortex-a72"; device_type = "cpu"; enable-method = "psci"; reg = <0x02>; }; cpu@3 { compatible = "arm,cortex-a72"; device_type = "cpu"; enable-method = "psci"; reg = <0x03>; }; }; ... psci { compatible = "arm,psci-0.2\0arm,psci"; cpu_off = <0x84000002>; cpu_on = <0xc4000003>; cpu_suspend = <0xc4000001>; method = "hvc"; migrate = <0xc4000005>; };
Best regards,
Vincent.