Hi,I am working on TI platform having 2 clusters of Cortex-A53 with 2 cores in each cluster. I am running TI provided Linux on cluster-0/core-0 with HYP mode software controlling stage-2 translation. While running linux and enabling stage-2 translation, I am getting data abort exception 0x96000035 (unsupported exclusive or atomic access). Surprisingly, even though EL2 is running, exception is generated at EL1 (in linux kernel). When I disable stage-2 translation, exception is not getting generated at EL1 and linux is booting successfully. I tried different combinations of sharable attributes but still, error persists.
Can anybody give hint on the issue?
You can control (check manual for the specific register) where exception should be directed to.
An exception in EL0/El1 can be handled in EL1 or EL2.
An exception in EL2 can be handled in EL2 or EL3.
Check what the cacheablility attributes in S2 are, also check the HCR_EL2.CD and HCR_EL2.DC. I suspect S2 is causing the access to be treated as Device.
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