Hello,
I have run two different bare-metal programs on two corresponding ARM cores in Cyclone V (Cortex-A9) in DS5 using JTAG line. The SDRAM is shared between the two cores as is evident from the cache settings which is set to "shared" by default. Core 1 is held in reset after a system reset is issued (Cold or warm). After reset, Core 0 is allowed to execute instructions. I know how to release the core 1 from reset and it works perfectly. But the next question is: How can I write a short sequence of instructions for Core#0 in bare-metal to inform core#1 of where to start executing the program??
Note: In DS5 using JTAG chain I could easily run two different programs on Core#0 & Core#1, but how could it be done if the bare-metal program is running from SD card.
Both cores start from address 0 or 0xffff.ff00. So if the code of core 1 is at 0x00100000, you must write a "b 0x0010000" at either of these addresses before releasing reset.
Likely you need to remap onchip SRAM to 0 before doing so!