I have a question about C/C++ atomic operation on ARM9 and ARM Cortex-M4. I am using ARMCC compiler with C / C++ languages. It interests me if it is possible that an interrupt will be handled in the middle of operations:
Does anything change if you access to these objects indirectly by pointer or reference?
Are there any other basic operations potentially unsafe in multi-thread application?
Thanks for answers.
Hi Carlos,
Sorry that I forgot to specify that the LDM/STM resume behavior is for ARMV7-M, where ICI/IT bits present in xPSR. (ie Cortex-M3/M4/M7). For ARMv6-M (Cortex-M0/M0+), the LDM/STM are abandoned and restarted after interrupt service.
There are no LDRD/STRD instructions in ARMv6-M.
Regards,
Joseph
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Thanks.