ARM Cortex A8 - if IRQ interrupts are disabled in CPSR register While the processor is executing, system results in data abort. What might be the reason to trigger data abort

ARM Cortex A8 - if IRQ interrupts are disabled in CPSR register While the processor is executing, system results in data abort. What might be the reason to trigger data abort

cpsid i;          // instruction used to disable the IRQ

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