About Cortex-R4 Errta No.599517 (Prefetch instruction)


We are using Cortex-R4 based device(RM46L430)
and we need some advice about the recent Errata "No.599517".

This errata mentions that "The operation to prefetch an instruction by MVA,
as defined in the ARMv6 architecture" a CP15 accesses may generate an UNDEFINED exception.
The instruction is "MCR p15,0,<Rt>,c7,c13,1 ; NOP".

We would like to know, in case of a practical application where exactly this
errata could effect?. We don't know how to find out if our application program is using this instruction,
Do we have to explicitly write a assembly code(above) in order to see this error?

Best Regards.