Which instruction format does Cortex-R support,encoding A1 orA2?

I see it support encoding T2 for Thumb-2 instruction set.But which instruction format does Cortex-R support for ARM instruction,encoding A1 orA2?

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  • It should assemble a MOV with the 16-bit constant as a MOVW if the cpu option specifies an ARMv7 device, have you done that?

    You can see the MOVW encoding only came in with ARMv6T2, so one could only use 8 bit shifted constants before then.


    MOV and MOVN  are good for loading common constants where most of the bits are zero or one. They load an 8-bit constant or its negated value and rotate the 32 bit register, so MOV can for instance load 0x00520000.
    MOVW is especially useful paired with MOVT to load a 32 bit address.

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  • It should assemble a MOV with the 16-bit constant as a MOVW if the cpu option specifies an ARMv7 device, have you done that?

    You can see the MOVW encoding only came in with ARMv6T2, so one could only use 8 bit shifted constants before then.


    MOV and MOVN  are good for loading common constants where most of the bits are zero or one. They load an 8-bit constant or its negated value and rotate the 32 bit register, so MOV can for instance load 0x00520000.
    MOVW is especially useful paired with MOVT to load a 32 bit address.

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