Operation of ARMv7 pipeline for simple instructions

I am new to ARM architecture and trying to understand ARMv7 pipelining.I am comfortable with armv7 instruction set

Can anyon provied me simple example for operation ARMv7 pipeline with simple instrction?

Thanks

Amit

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  • Hi Tamar,

    Welcome to the ARM family!

    There is an important distinction which I think you are missing. This is to be careful to distinguish the architecture (ARMv7-A, ARMv5TE etc) from the implementation (Cortex-A15, ARM926EJ-S etc). The architecture of a device specifies its behaviour and functionality i.e. the instruction set, register set, exception model, programmer's model etc. Specifically, this says nothing about pipeline structure or any number of other internal microarchitectural details. These are part of a specific implementation of that architecture.

    So, for instance, Cortex-A15 and Cortex-A7 are both implementations of ARMv7-A architecture (with some extensions). So they are binary compatible. But internally they are very different. Cortex-A15 has a much longer and more complex pipeline, whereas Cortex-A7 has a more straightforward pipeline. Cortex-A15 is superscalar, Cortex-A7 is in-order.

    So, it doesn't really make sense to ask the question the way you phrased it as there are many different implementations of the ARMv7 architecture.
    They can all have different pipeline structures and will differ internally in many other ways too. You can find some information (not all is disclosed publically) about individual implementations in the Technical Reference Manuals for individual processors - you can find these on ARM's website at infocenter.arm.com.

    I hope that makes sense and gives you some pointers for further research.

    Chris

Reply
  • Hi Tamar,

    Welcome to the ARM family!

    There is an important distinction which I think you are missing. This is to be careful to distinguish the architecture (ARMv7-A, ARMv5TE etc) from the implementation (Cortex-A15, ARM926EJ-S etc). The architecture of a device specifies its behaviour and functionality i.e. the instruction set, register set, exception model, programmer's model etc. Specifically, this says nothing about pipeline structure or any number of other internal microarchitectural details. These are part of a specific implementation of that architecture.

    So, for instance, Cortex-A15 and Cortex-A7 are both implementations of ARMv7-A architecture (with some extensions). So they are binary compatible. But internally they are very different. Cortex-A15 has a much longer and more complex pipeline, whereas Cortex-A7 has a more straightforward pipeline. Cortex-A15 is superscalar, Cortex-A7 is in-order.

    So, it doesn't really make sense to ask the question the way you phrased it as there are many different implementations of the ARMv7 architecture.
    They can all have different pipeline structures and will differ internally in many other ways too. You can find some information (not all is disclosed publically) about individual implementations in the Technical Reference Manuals for individual processors - you can find these on ARM's website at infocenter.arm.com.

    I hope that makes sense and gives you some pointers for further research.

    Chris

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