What is Early write acknowledgement?

Hi all,

What is early write acknowledgement and how this attribute affects the continuous read/write performed on the peripheral/physical memory ?

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  • Have you read the ARMv8 ARM, here?

    ARM Architecture Reference Manual, ARMv8, for ARMv8-A architecture profile

    Specifically - section B2.8.2 - Device memory.

    It describes what Early Write Acknowledgement is pretty well - from a simplified point of view, it's a hint to the memory subsystem that any write can be acknowledged at any point on the bus between the core/cluster and the target peripheral at that address (be that memory controllers or serial ports). Without the Early Write Acknowledgement attribute, the core must wait for the end peripheral to signal that it acknowledges the write request. Note the description that it is a hint, and describes two situations where a system may implement the hint but do the opposite (either way is consistent with the architecture, the impact is invisible to the programmers' view defined in the architecture, but if it is taken seriously then the design as a whole may be a little more efficient). It pretty clearly describes the effect on ordering rules (i.e. none)

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  • Have you read the ARMv8 ARM, here?

    ARM Architecture Reference Manual, ARMv8, for ARMv8-A architecture profile

    Specifically - section B2.8.2 - Device memory.

    It describes what Early Write Acknowledgement is pretty well - from a simplified point of view, it's a hint to the memory subsystem that any write can be acknowledged at any point on the bus between the core/cluster and the target peripheral at that address (be that memory controllers or serial ports). Without the Early Write Acknowledgement attribute, the core must wait for the end peripheral to signal that it acknowledges the write request. Note the description that it is a hint, and describes two situations where a system may implement the hint but do the opposite (either way is consistent with the architecture, the impact is invisible to the programmers' view defined in the architecture, but if it is taken seriously then the design as a whole may be a little more efficient). It pretty clearly describes the effect on ordering rules (i.e. none)

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