• State Not Answered
  • Locked Locked
  • Replies 8 replies
  • Subscribers 348 subscribers
  • Views 46247 views
  • Users 0 members are here
Options
Related
How was your experience today?
This discussion has been locked.
You can no longer post new replies to this discussion. If you have a question you can start a new discussion

How AXI addressing works for fixed burst with unaligned address.

vikas verma
Please consider following example:

Data bus width = 32 bit
burst size = 4 bytes
Burst length = 3
Address = 0x02
burst type = FIXED.

Write strobes are high from byte address 0x02 to the last byte in this burst i.e. in first data beat 2 write strobes are high and in remaining data beats all 4 are high.

If this is a write transfer which byte addresses of AXI slave will be written.

I am confused between these two:
1. In first data beat, byte locations 0x02 and 0x03 will be written. In second and subsequent data beats, since all strobes are high address 0x00 to 0x03 will be written
2. In first data beat, byte locations 0x02 and 0x03 will be written. In second and subsequent data beats, since address is 0x02, only two byte for 0x02 and 0x03 will be written.

Thanks in advance.
Parents
  • 0
    Note: This was originally posted on 20th March 2009 at http://forums.arm.com

    Hi Vik,

    No, all transfers in this example can only use WSTRB[3:2], because the burst is to a FIXED location.

    WSTRB bits can only be asserted for byte lanes that can contain valid data, so you cannot drive all 4 WSTRB bits high and assume the slave knows only WSTRB[3:2] are valid because of the address used.

    Your use of an unaligned address for this FIXED burst means all transfers in the burst have the same byte lane restriction.

    JD
Reply
  • 0
    Note: This was originally posted on 20th March 2009 at http://forums.arm.com

    Hi Vik,

    No, all transfers in this example can only use WSTRB[3:2], because the burst is to a FIXED location.

    WSTRB bits can only be asserted for byte lanes that can contain valid data, so you cannot drive all 4 WSTRB bits high and assume the slave knows only WSTRB[3:2] are valid because of the address used.

    Your use of an unaligned address for this FIXED burst means all transfers in the burst have the same byte lane restriction.

    JD
Children
No data