In AHB-Lite cases, every transfer starts with address phase with signals from master.
And also in multi-master cases, arbiter decides with whether it can GRANT bus access to other masters or not.
So, I think it's fine to only let masters or arbiters to know whether it is locked sequence or not.
However, on the document HMASTERLOCK signal is sent to slave.
Why do we need this?
Is there any cases slaves use HMASTERLOCK signal for?
View all questions in Cortex-A / A-Profile forum