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how to understand L1 cache but L2 & L3 non-cached

phil9980

A5.6.6 Memory Behavior
The Cortex-A55 core supports all the ARMv8 memory types.
However, the following behaviors are simplified and so for best performance their use is not recommended:
Write-Through

Memory that is marked as Write-Through cannot be cached on the data-side and does
not make coherency requests. On the instruction-side, areas that are marked as Write-
Through and Write-Back can be cached in the L1 instruction cache. However, only
areas marked as Write-Back can be cached in the L2 cache or the L3 cache.


Mixed inner and outer cacheability


Memory that is not marked as inner and outer Write-Back cannot be cached on the
data-side and does not make coherency requests. This applies to the memory type
only, and not to the allocation hints. All caches within the cluster are treated as being
part of the inner cacheability domain

Hi,

The .above description is reference to cortex a55 trm file.

1)However, only areas marked as Write-Back can be cached in the L2 cache or the L3 cache.

how to understand this  sentence? Does it mean that in this situation, the data and instruction cache from memory to L1 directly? How L1 access memory directly bypass L2?

2) This applies to the memory type only, and not to the allocation hints. 

Does it mean if support cache allocation, the data can also be cached?

Thanks

Parents
  • +1

    1) Almost.  If you mark something as write-through, you get different behavior for instruction and data accesses.

    Data: Not cached at all, in any level.

    Instruction: Cached at L1 only.  Not cached at L2 or L3.

    2) It's talking about something slightly different.  For a given region you have a caching policy (non-cacheahble, write-back, write-through) and an allocation hint. 

    The allocation hint only applies to cacheable regions (write-back or write-through).  The allocation hint says which cache misses cause a line-fill, reads and/or writes.  For example, if you say read-allocate it means only allocate on read misses.  If you say, read/write allocate then allocate on both read and write misses.  The allocation hint is, well, a hint.  The processor might ignore you.

    What the quoted section is saying is that it's only the policy (write-back vs write-through) which is being discussed.  The allocation hint makes no difference.

Reply
  • +1

    1) Almost.  If you mark something as write-through, you get different behavior for instruction and data accesses.

    Data: Not cached at all, in any level.

    Instruction: Cached at L1 only.  Not cached at L2 or L3.

    2) It's talking about something slightly different.  For a given region you have a caching policy (non-cacheahble, write-back, write-through) and an allocation hint. 

    The allocation hint only applies to cacheable regions (write-back or write-through).  The allocation hint says which cache misses cause a line-fill, reads and/or writes.  For example, if you say read-allocate it means only allocate on read misses.  If you say, read/write allocate then allocate on both read and write misses.  The allocation hint is, well, a hint.  The processor might ignore you.

    What the quoted section is saying is that it's only the policy (write-back vs write-through) which is being discussed.  The allocation hint makes no difference.

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