semaphore_take: mov w2, #1 // LOCK value dmb sy // ensure all observers observe data before aquire is attempted ldaxr w1, [x0] // attempt to read and aquire lock cbnz w1, semaphore_take // lock is not zero so loop and try and aquire again stxr w3, w2, [x0] // attempt to store LOCK value cbnz w3, semaphore_take // retry if store failed dmb sy // ensures that all subsequent accesses are observed after gaining of the lock is observed
The above semaphore code worked flawlessly until the moment I added FIQ code.
Now the semaphore leaks thru critical sections even though the FIQ does not come anywhere near the semaphore.
Is there something I need to know about FIQ and LDREX/STREX functions?
Yeah I save all the registers and the core doing the FIQ isn't the one with the semaphore issue it is another core.
I thin the issue vstehle discusses below the dam local monitor gets trashed and looks like I need something like a CLREX on the Fiq.
... but then the store should fail.
The FIQ has the effect of clearing the local monitor on exception return.
(See the architecture manual https://developer.arm.com/docs/ddi0487/latest, B2.9.4 Context switch support)
Also, I am not sure if you can mix "ldaxr" and "stxr". According the TRM, "ldaxr" needs "stlxr".
Maybe dumb question, but do you save all registers in your FIQ code?
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