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Significance of [MS] and [LS] in big-endian data bus in AHB5 Specification

Hi,

As indicated in few previous answers (Link Given below) on the big-endian, I believe that the big-endian type in AHB-Lite Spec is BE32. And further the AHB5 Spec added another type of big-endian as BE8. Hence, the active byte lanes for a 32-bit big-endian data bus should be the same which are described in AHB-Lite (AMBA 3 Spec, Table 6-2) and AHB5 (AMBA 5 Spec, Table 6-3).

However, in the AMBA 5 Spec the table has byte lanes as "Active[MS]" and "Active[LS]". It was not like that in AMBA 3 Spec. What is the significance of MS and LS here? Are they MSB Bytes and LSB Byte?

And just for a quick confirmation, Since, the AHB5 only adds BE8, are the tables "AMBA 3 Spec, Table 6-2" and "AMBA 5 Spec, Table 6-3" same and they are for BE32 only?

Endian about AHB-Lite and AHB5 Specification

How to select endianess in AHB?

For your reference I have attached the table here.

AMBA 3 Spec, Table 6-2: Active byte lanes for a 32-bit big-endian data bus

Transfer Size Address Offset DATA[31:24] DATA[23:16] DATA[15:8] DATA[7:0]
Word 0 Active Active Active Active
Halfword 0 Active Active
Halfword 2 Active Active
Byte 0 Active
Byte 1 Active
Byte 2 Active
Byte 3 Active

AMBA 5 Spec, Table 6-3: Active byte lanes for a 32-bit word-invariant big-endian data bus

Transfer Size Address Offset DATA[31:24] DATA[23:16] DATA[15:8] DATA[7:0]
Word 0 Active[MS] Active Active Active[LS]
Halfword 0 Active[MS] Active[LS]
Halfword 2 Active[MS] Active[LS]
Byte 0 Active
Byte 1 Active
Byte 2 Active
Byte 3 Active

I have one more question - Does AHB system has BE-A (Address invariant) format also? But I believe the AHB Specs do not discuss about them.

Many Thanks,

Manish

Parents
  • Hello Manish,

    The AMBA 3 AHB-lite spec didn't include MS (most significant) byte and LS (least significant) byte indications in the endianness diagrams because they were not needed. The word invariant endianness scheme supported there does not reorder bytes within larger data quatities, so the MS byte would always be the one on the higher data bus bits and the LS byte on the lower data bus bytes.

    Comparing a 32-bit access across all possible bus endiannesses supported will see the same active byte lanes being used regardless. But for the BE-8 case the order of the 4 bytes within the 32-bit data will be reversed compared to the other 2 endian types (BE-32 and LE).

    For your question comparing tables 6-2 (AHB-lite) and 6-3 (AHB5), they are listed as both describing word-invariant big-endian buses, so yes they should be the same, and yes they are only for BE-32 (which is word invariant big-endian). Are you seeing something different that needs explaining further ?

    And your final question about "address invariant", I'm not sure what this actually is. The address bus format doesn't change regardless of the data bus endianness. Probably best not trying to think of another endianness type to throw in to the confusion :)

    Colin

Reply
  • Hello Manish,

    The AMBA 3 AHB-lite spec didn't include MS (most significant) byte and LS (least significant) byte indications in the endianness diagrams because they were not needed. The word invariant endianness scheme supported there does not reorder bytes within larger data quatities, so the MS byte would always be the one on the higher data bus bits and the LS byte on the lower data bus bytes.

    Comparing a 32-bit access across all possible bus endiannesses supported will see the same active byte lanes being used regardless. But for the BE-8 case the order of the 4 bytes within the 32-bit data will be reversed compared to the other 2 endian types (BE-32 and LE).

    For your question comparing tables 6-2 (AHB-lite) and 6-3 (AHB5), they are listed as both describing word-invariant big-endian buses, so yes they should be the same, and yes they are only for BE-32 (which is word invariant big-endian). Are you seeing something different that needs explaining further ?

    And your final question about "address invariant", I'm not sure what this actually is. The address bus format doesn't change regardless of the data bus endianness. Probably best not trying to think of another endianness type to throw in to the confusion :)

    Colin

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