Hi,
Does Armv7-A have a write buffer?
If yes, when will the write buffer be drained and what's the purpose of write buffer?
Hi Youq,
If you look at e.g. the Cortex-A9 TRM, you will see the write buffers are mentioned:
"The data side of the L1 memory system has:
two 32-byte linefill buffers and one 32-byte eviction buffer
a 4-entry, 64-bit merging store buffer."
Thank you.
I think this is about store buffer not write buffer. Store buffer is mainly used to hold store operation to Cache after committed by Load Store Unit. Write buffer is used to hold store operation to main memory. I think the two are different.
The TRM mentions three types of buffers:
The last one is your write buffer.
It will merge writes from L/S unit to nearby memory locations.
It can be drained with a DSB.
See https://community.arm.com/tools/f/discussions/1031/armv7-34-write-buffer-34-issue
OK.
Thank you very much.
I have another question. DMB is enough to drain store buffer, am I right?
DMB ensures ordering only.
It will not "wait" for the write buffer.
See https://community.arm.com/processors/f/discussions/3287/questions-regarding-dmb-dsb-and-isb
Thank you!