Hi all,I noticed there are multiple system control registers in ARM.
The SCTLR_EL1 , SCTLR_EL2 and SCTLR_EL3.
I want to know, what do multiple such system controls registers represent??
I am particularly interested in the A bit of the system control register.
How does the A bit work when all these registers are involved?
For instance, When the A bit is enabled in say SCTLR_EL1 but not in SCTLR_EL2, what happen in case of an unaligned access?
Do we encounter a segmentation fault?
if yes why?
As 42Bastian said, the different copies of the register apply to different ELs:
The controls are independent so that different pieces of software can make different decisions. For example, a hypervisor (at EL2) might want A=1 and the OS might want A=0. This way they each have the setting they want.
1) Does this mean that, if i want to enable strict alignment checking in user process, all I have to do is set EL0 system control register?2) Is there a way to change the bit during the runtime of the program (say a C program)? I am aware of ACLE system register(https://developer.arm.com/products/software-development-tools/compilers/arm-compiler-5/docs/101028/latest/9-system-register-access). But is this the function I use to change this?
EL0 has not dedicatated control register (read Martin's answer again).
EL0 cannot change settings of EL1 registers (or any others)-
Oh, i never noticed. Thanks for the information.But is there a way to query the A bit of EL0 and EL1 registers respectively, if not change it?
Please read the ARMv8-A manual you were linking in another thread, for example:UMA
User Mask Access. Controls access to interrupt masks from EL0, when EL0 is using AArch64.
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