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Break point at SWI handler

Henry

Hi everyone,

I'm using Jlink with openocd to debug ARM926EJ-S and encountered problem when executing SWI command.

Even though I don't set a break point at SWI handler but the CPU breaks at SWI handler automatically. How to remove the break point and make the CPU run continuously after every SWI command ?

Thank you very much.

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  • 0

    Oh I know the reason,

    OpenOCD manual says that :

    Command: arm semihosting

    [enable|disable]

    Display status of semihosting, after optionally changing that status.

    Semihosting allows for code executing on an ARM target to use the I/O facilities on the host computer i.e. the system where OpenOCD is running. The target application must be linked against a library implementing the ARM semihosting convention that forwards operation requests by using a special SVC instruction that is trapped at the Supervisor Call vector by OpenOCD.

    So run command arm semihosting disable to solve the problem.

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  • 0

    Oh I know the reason,

    OpenOCD manual says that :

    Command: arm semihosting

    [enable|disable]

    Display status of semihosting, after optionally changing that status.

    Semihosting allows for code executing on an ARM target to use the I/O facilities on the host computer i.e. the system where OpenOCD is running. The target application must be linked against a library implementing the ARM semihosting convention that forwards operation requests by using a special SVC instruction that is trapped at the Supervisor Call vector by OpenOCD.

    So run command arm semihosting disable to solve the problem.

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