I need to know if there is the same of the Last Branch Recording (LBR) hardware feature of the Intel processors on Arm processors for instruction level monitoring during the life-time of a process with minimal overhead.
Not sure what LBR does, but ARM's ETB records "only" branches instead of a full trace.
Which ARM processors implement it ?
Cortex-A9 for example.Follow: community.arm.com/.../reading-etb-from-software
AET uses external agent to save debug and trace data. This agent is connected via eXtended Debug Port (XDP) and interfaces with In-Target Probe (ITP). Overhead of AET "can have a significant effect on system performance, which can be several orders of magnitude greater" according to this paper, because AET can generate/capture more types of events. But the collected data storage is external to debugged platform.
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