Arm Community
Site
Search
User
Site
Search
User
Groups
Arm Research
DesignStart
Education Hub
Graphics and Gaming
High Performance Computing
Innovation
Multimedia
Open Source Software and Platforms
Physical
Processors
Security
System
Software Tools
TrustZone for Armv8-M
中文社区
Blog
Announcements
Artificial Intelligence
Automotive
Healthcare
HPC
Infrastructure
Innovation
Internet of Things
Machine Learning
Mobile
Smart Homes
Wearables
Forums
All developer forums
IP Product forums
Tool & Software forums
Support
Open a support case
Documentation
Downloads
Training
Arm Approved program
Arm Design Reviews
Community Help
More
Cancel
Developer Community
IP Products
Processors
Jump...
Cancel
Processors
Classic processors forum
ARM9 replacing Cortex M3
Blogs
Forums
Videos & Files
Help
Jump...
Cancel
New
State
Accepted Answer
+1
person also asked this
people also asked this
Replies
9 replies
Subscribers
2 subscribers
Views
5489 views
Users
0 members are here
Cortex-M3
Arm9
Cortex-M
Related
ARM9 replacing Cortex M3
Offline
Michael von Hauff
over 7 years ago
Top replies
Offline
Simon Craske
over 7 years ago
+1
verified
Note: This was originally posted on 7th January 2009 at http://forums.arm.com Mike, What are you trying to achieve? A 72MHz Cortex-M3 should be able to move upto around 144 MBytes per second using word...
Parents
0
Offline
Michael von Hauff
over 7 years ago
Note: This was originally posted on 7th January 2009 at
http://forums.arm.com
RAM size and Flash size are not factors (even the smallest amounts available are enough)
I am aware that the DMA does not run as fast, which is why the Cortex M3 is not sufficient. The fastest available cortex m3 is 72Mhz, which gives a DMA transfer speed of 18Mbytes/s. A 100MHz version is going to be available soon but I am not holding my breathe as it would barely fit the requirements (maybe not even).
I am interfacing to devices capable of 40MByte/s transfer speeds. The peripheral is not the current limitation. The DMA is.
All I care about!:
Standby Power
Wake time
DMA transfer speed
Wakeup time is the hardest thing to find out. But I am hoping someone has had some experience with an ARM9 varient and will share that knowledge with me.
Thanks,
Mike.
Cancel
Up
0
Down
Reply
Accept answer
Cancel
Reply
0
Offline
Michael von Hauff
over 7 years ago
Note: This was originally posted on 7th January 2009 at
http://forums.arm.com
RAM size and Flash size are not factors (even the smallest amounts available are enough)
I am aware that the DMA does not run as fast, which is why the Cortex M3 is not sufficient. The fastest available cortex m3 is 72Mhz, which gives a DMA transfer speed of 18Mbytes/s. A 100MHz version is going to be available soon but I am not holding my breathe as it would barely fit the requirements (maybe not even).
I am interfacing to devices capable of 40MByte/s transfer speeds. The peripheral is not the current limitation. The DMA is.
All I care about!:
Standby Power
Wake time
DMA transfer speed
Wakeup time is the hardest thing to find out. But I am hoping someone has had some experience with an ARM9 varient and will share that knowledge with me.
Thanks,
Mike.
Cancel
Up
0
Down
Reply
Accept answer
Cancel
Children
No data
More questions in this forum
By title
By date
By reply count
By view count
By most asked
By votes
By quality
Descending
Ascending
All recent questions
Unread questions
Questions you've participated in
Questions you've asked
Unanswered questions
Answered questions
Questions with suggested answers
Questions with no replies
Answered
MIPS Calculation on ARMv7
+1
Armv7-A
Armv7-M
Arm9
7664
views
5
replies
Latest
over 4 years ago
by
Yasuhiko Koumoto
Answered
Why does ARM have 64KB Large Pages?
0
Arm7
Memory Management Unit (MMU)
3120
views
1
reply
Latest
over 4 years ago
by
Yasuhiko Koumoto
Answered
What is the difference between instruction prefetch and instruction pipelining in arm7tdmi?
+1
Arm7
7594
views
6
replies
Latest
over 4 years ago
by
Yasuhiko Koumoto
Answered
can anyone tell me the difference between pipelined bus and depipelined bus?and i have uploaded two screen shot of both so what does that arrow from mclk to a[31:0] indicates?
0
Arm7
8674
views
9
replies
Latest
over 4 years ago
by
Colin Campbell
Answered
Modified harvard architecture
0
Arm7
19029
views
13
replies
Latest
over 5 years ago
by
G. Goodwin L. Pitos
<
>
View all questions in Classic processors forum