Cortex-M0 DesignStart R2

For the last weeks, I have been trying to get this new version to work. I did the same as with the previous version and now it is running on the Xilinx Nexys4. However, honestly I do not have any idea how to get the debugging to work. I defined the pins for SWD and connected to an Segger J-Link, but no connection was possible. There is the configuration option ‘define ARM_CMSDK_INCLUDE_JTAG. In removed this, no success. I changed to ‘define ARM_CMSDK_INCLUDE_SWD, no success. I am running out of ideas.

It seems I am missing something important.

Kind Regards

Eberhard Binder

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  • Hi Eberhard,

    Firstly, the ARM_CMSDK_INCLUDE_JTAG has no effect when you use the obfuscated Cortex-M0 from DesignStart Eval, it's only important if you used the full RTL for the processor.

    If you're using your own top-level wrapper for the Xilinx FPGA, did you replicate the tri-state drive for CS_TMS/dbg_swo_tms_o?

    You also could check that the 4 wires used by SWD connect through to the obfuscated core level, there should be nothing else to go wrong that I can think of on the hardware side.  At the CORTEXM0INTEGRATION level, these are SWDITMS, SWDO, SWDOEN and SWCLKTCK.

    Two of the signals used for JTAG, TDO and nTDOEN are not needed for SWD mode. It's possible that these got connected by mistake since the signal names are a little confusing.

    Sean

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  • Hi Eberhard,

    Firstly, the ARM_CMSDK_INCLUDE_JTAG has no effect when you use the obfuscated Cortex-M0 from DesignStart Eval, it's only important if you used the full RTL for the processor.

    If you're using your own top-level wrapper for the Xilinx FPGA, did you replicate the tri-state drive for CS_TMS/dbg_swo_tms_o?

    You also could check that the 4 wires used by SWD connect through to the obfuscated core level, there should be nothing else to go wrong that I can think of on the hardware side.  At the CORTEXM0INTEGRATION level, these are SWDITMS, SWDO, SWDOEN and SWCLKTCK.

    Two of the signals used for JTAG, TDO and nTDOEN are not needed for SWD mode. It's possible that these got connected by mistake since the signal names are a little confusing.

    Sean

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