DesignStart Eval on Terasic MAX10-Standard Board


I am a beginner for FPGA.Now I plan migrate an example system including  the Cortex-M3 for mps2+platform to  the MAX-10 Standard Board.

I have solve the problem about plls.

but if I try to compile the ".sof" file of the Eval package in Quartus Prime file, I get the error that there are not enough i/os (430 required, 288 available).

how can I solve this problem?