Cortex-M1 for Xilinx FPGAs, max. clock frequency?

Hello,

I have already played around with the Cortex-M1 reference designs for Xilinx Spartan and Artix boards, can you give an indication of what your maximum target frequency for the processor IP core is? Are the referenced 100 MHz a good design practice or even more a limit?

Thank you.

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  • Hi Nuelle, have you managed to use the Cortex-M1 or M3 DesignStart projects for the arty A35? I'm tring to make them run but I have some problems running the implementation regarding some time limits, and maybe you have done it by just configuring a lower clock frequency.

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  • Hi Nuelle, have you managed to use the Cortex-M1 or M3 DesignStart projects for the arty A35? I'm tring to make them run but I have some problems running the implementation regarding some time limits, and maybe you have done it by just configuring a lower clock frequency.

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