Can a student simulate the free Cortex-M from DesignStart?

I saw, and tried in the past already, to simulate the Cortex-M0. It does not really matter efficiency, customization and so on, but only the learning process behind a steup for a correct very basic simulation.

I was trying to setup a Linux machine, when in the basic steps of the quick guide, I read:

Verilog simulator requires the install of one of the following:

  • Mentor QuestaSim version 10.4e_1. You are required to set the environment variable QUESTASIM_HOME to reference your QuestaSim installation directory.
  • Cadence IUS version 15.20.008.
  • Synopsys VCS version 2016.06-SP2.

Now, I tried with ModelSim (thinking was like QuestaSim), but apparently the free version (Student Edition) works only on Windows and the code may be more than 10000 LOC, making it not executable.

As a student, is it possible to play with any kind of emulator? Are there (even buggy) alternatives for these emulators?

Thanks to all

  • The quickstart guide specified which simulators are supported because the testbench included simulation scripts for these simulators. However, since the design is just Verilog (2001 I think), technically you could use other simulators, but you will have to port the simulation scripts.

  • The initiative to distribute free ARM processor source code is called DesignStart. DesignStart Eval allows universities to obtain synthesized and simulated flattened and obfuscated Verilog processor codes and examples of on-chip systems for educational and research purposes. With the possibility of prototyping in FPGA, but without the manufacture of real chips. We took this opportunity.
    The procedure is as simple as possible. You must register on the ARM website and submit an application. They will upgrade within a couple of days and it becomes possible to download the archive with source codes.
    1) Appearance on the Cortex-M0:
    https://developer.arm.com/.../designstart-eval-cortex-m0-login
    2) Appearance on the Cortex-M3:
    https://developer.arm.com/.../designstart-eval-cortex-m3-login
    DesignStart Pro and DesignStart Pro Academic allow you to access the full source code of the processor on RTL Verilog and the subsystems necessary for essay writer manufacturing in silicon (for example, power management nodes, clock gating, clock and reset resources). Academic license allows you to manufacture a batch of up to 1000 chips for internal use (for example, for testing and evaluation of research results). The full version makes it possible to manufacture chips for sale.