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DesignStart forum
  • Description Discussion about custom SoC design with Arm IP through the easy-access DesignStart program.
  • Threads 168 Questions
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Unanswered questions
  • x_gate
    Porting AT472-BU-98000-r0p1-00rel0 to Avnet 7a50t development board failed
    Not Answered 1 month ago
  • thexeno
    Simulate Cortex-M0 FPGA implementation in ModelSim
    Answered over 3 years ago
  • Vignesh vsg
    How to send the encoder/ pulses over serial port of 8051
    Not Answered 2 months ago
  • chrismrutherford
    m1/m3 design start download problems
    Not Answered 4 months ago
  • Brix
    Zephyr RTOS support for Cortex-M1 reference design is here
    Answered 6 months ago
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DesignStart forum

  • Not Answered

    Porting AT472-BU-98000-r0p1-00rel0 to Avnet 7a50t development board failed 0

    150 views
    0 replies
    Started 1 month ago
    by x_gate
  • Answered

    Simulate Cortex-M0 FPGA implementation in ModelSim +1

    • Verilog
    • Cortex-M0
    • FPGA
    • CHI
    • Compiling
    • DesignStart
    • MPI
    • Cortex-M
    • Windows
    • Linux
    2550 views
    2 replies
    Latest 1 month ago
    by JamesBr
  • Not Answered

    How to send the encoder/ pulses over serial port of 8051 0

    380 views
    0 replies
    Started 2 months ago
    by Vignesh vsg
  • Not Answered

    m1/m3 design start download problems 0

    693 views
    2 replies
    Latest 4 months ago
    by ChrisR
  • Answered

    Zephyr RTOS support for Cortex-M1 reference design is here 0

    • Real Time Operating Systems (RTOS)
    • FPGA
    779 views
    1 reply
    Latest 5 months ago
    by Brix
  • Suggested Answer

    SWD: Cannot connect to MEM-AP on Cortex-M0 Designstart Eval 0

    • Cortex-M0
    • DesignStart
    • SWD
    967 views
    4 replies
    Latest 5 months ago
    by Bernhard Lang
  • Answered

    V2C-DAPLINK-035A shield schematic 0

    • FPGA
    • Debug Adapters
    739 views
    1 reply
    Latest 6 months ago
    by Sean Houlihane
  • Not Answered

    MPS3 HDMI Output 0

    692 views
    0 replies
    Started 6 months ago
    by davemap
  • Suggested Answer

    DesignStart Eval : The number of INTISR in Cortex-M3 0

    617 views
    1 reply
    Latest 6 months ago
    by Mahmood Yakub
  • Answered

    Does the DesignStart FPGA Cortex-M1/M3 support SWD multi-drop? 0

    • FPGA
    • SWD
    695 views
    1 reply
    Latest 6 months ago
    by Mahmood Yakub
  • Not Answered

    Cortex-M3 softcore minimal SoC 0

    • Cortex-M3
    • DesignStart
    808 views
    0 replies
    Started 8 months ago
    by TinyLabs
  • Suggested Answer

    'xilinx.com:ip:axi_bram_ctrl:4.0' does not support the current part 'xc7a35ticsg324-1L' 0

    • AXI
    • DesignStart
    • Support
    • Block
    5919 views
    5 replies
    Latest 8 months ago
    by Ahmed Benabdallah
  • Not Answered

    Design Start standard cell libraries have DRC errors in 45 RF SOI? 0

    548 views
    0 replies
    Started 8 months ago
    by Travis6
  • Answered

    ERROR: [IP_Flow 19-3461] Value 'reset' is out of the range for parameter 'RESET BOARD INTERFACE(RESET_BOARD_INTERFACE)' for BD cell 0

    3382 views
    3 replies
    Latest 8 months ago
    by jpthibault
  • Not Answered

    what is the extra FPGA utilization of debug/trace features in Cortex-M3 Xilinx edition 0

    524 views
    0 replies
    Started 9 months ago
    by yonathan
  • Not Answered

    Is it possible to run a cycle mode (i,e DSM=yes) for CORTEX-M0 processor? 0

    546 views
    0 replies
    Started 9 months ago
    by Rocker_Hacker
  • Not Answered

    Is it possible to run a cycle mode (i,e DSM=yes) for CORTEX-M0 processor? 0

    597 views
    0 replies
    Started 9 months ago
    by Rocker_Hacker
  • Not Answered

    PC can't recognize the mps2+ usb 0

    1546 views
    1 reply
    Latest 9 months ago
    by Michele Wilkinson
  • Suggested Answer

    the error using incorrect version of vivado to systhesis designstart 0

    1447 views
    1 reply
    Latest 10 months ago
    by Mahmood Yakub
  • Suggested Answer

    Cycle model build issue - ../../../../cortexm3_rtl 0

    • Cycle Models
    • DesignStart
    2049 views
    1 reply
    Latest 10 months ago
    by Mahmood Yakub
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