Arm is pleased to announce a new online training topic - An introduction to the AMBA ACE protocol.
This training topic covers essential information on Arm’s AMBA ACE protocol. Hardware system-level coherency enables the sharing of memory by system components without software having to perform cache maintenance to maintain coherency between caches. This course is for anyone designing, verifying, or integrating ACE components into a system.
The course starts by providing a refresher on the underlying AXI protocol before giving an overview of the ACE protocol and an introduction hardware coherency itself. It looks at the problems associated with delivering system-level coherency and how ACE provides a hardware coherency solution.
Next, the course looks at the additional channels and signals that ACE introduces before moving on to look at some different transaction types brought to life with detailed examples. The course shows how coherent operations are performed, the general flow of ACE transactions, and the mechanisms in place to maintain coherency.
Over the coming weeks, the course will be expanded to cover additional topics such as exclusive accesses, how ACE support barriers, distributed virtual memory (DVM), and the subset of ACE, ACE-Lite.
Our online training provides a structure of byte-sized videos and text articles that you can delve into in your own time.
Introduction to the AMBA ACE protocol costs $99 for three months of access.
You can also browse and search for our online training course on our developer page. Or to contact us directly about training, email Online training at Arm.