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Forums

  • SoC Design forum

    The SoC Design community is the place to be when planning, designing, or researching your SoC. Here, we discuss design and implementation, Artisan or other physical IP, manufacturing processes and technology challenges.
    363 questions
    LloydG
    What is a NIC-400 APB Group? 10 hours ago
All questions in this Community
  • Answered

    What purpose do wrapping BURST transfers serve? +2

    • AHB-Lite
    • AHB
    12571 views
    1 reply
    Latest over 1 year ago
    by Colin Campbell
  • Answered

    Can a simple processor with load-store architecture support BURST? 0

    • AHB-Lite
    • Processor Architecture
    • AHB
    10374 views
    1 reply
    Latest over 1 year ago
    by Colin Campbell
  • Answered

    Why does an AHB slave require HBURST signal? 0

    • AHB
    • Memory
    11202 views
    1 reply
    Latest over 1 year ago
    by Colin Campbell
  • Answered

    What purpose does BURST feature in AHB serve? 0

    • Protocols
    • Architecture
    • AHB-Lite
    • Processors
    • AHB
    12542 views
    1 reply
    Latest over 1 year ago
    by Colin Campbell
  • Suggested Answer

    Is there any scenario where HWDATA and HRDATA are used simultaneously? 0

    • AMBA 3 AHB Interface
    9911 views
    1 reply
    Latest over 1 year ago
    by Colin Campbell
  • Not Answered

    Bypassing all clock gates in Cortex-R52 (ARMv8) 0

    • Cortex-R52
    • FPGA
    9524 views
    0 replies
    Started over 1 year ago
    by Zack Yang
  • Not Answered

    [ARM GICv3 - GIC Stream protocol] An interrupt being retrieved from a CPU interface! 0

    • GICv3/v4
    • Generic Interrupt Controller
    10137 views
    1 reply
    Latest over 1 year ago
    by Martin Weidmann
  • Not Answered

    One question about the power pin connection on Arm Artisan 14nm 14LPP High-Speed Single-Port SRAM 0

    9372 views
    0 replies
    Started over 1 year ago
    by binbin
  • Suggested Answer

    When should APB slave Sample address/Data for read/write transaction from APB master? 0

    14897 views
    5 replies
    Latest over 2 years ago
    by Colin Campbell
  • Not Answered

    AXI 4 UPsizer Downsizer module's protocol checker Error with WSTRB? 0

    9948 views
    2 replies
    Latest over 2 years ago
    by Colin Campbell
  • Not Answered

    Is during AXI unaligned transfer not all WDATA bits used? 0

    • AXI
    • AXI4
    10429 views
    1 reply
    Latest over 2 years ago
    by Colin Campbell
  • Not Answered

    When Wrapping happens in AXI? 0

    • AXI
    • AXI4
    10527 views
    1 reply
    Latest over 2 years ago
    by Colin Campbell
  • Not Answered

    What is Byte Invariance 0

    10948 views
    1 reply
    Latest over 2 years ago
    by Colin Campbell
  • Not Answered

    Timing simulation with ARM standard library 0

    8364 views
    0 replies
    Started over 2 years ago
    by Yongchan Jeon
  • Not Answered

    Can the ARM corrupt the timing on the AXI bus 0

    • AMBA
    • FPGA
    • AXI
    8364 views
    0 replies
    Started over 2 years ago
    by skbrown
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