An AXI manager when transacting on a 256-bits wide data bus, issues the following transaction on the write address channel:
address width: 32
data width : 256
awlen : 0
awsize : 3'h5
awid : 0
and the corresponding transaction on the write data channel:
wdata : 256'h940d_a33e_8a00_0000_0000_0000_0000_0000_0000_0000_0000_0000_0000_0000_0000_0000;
wstrb : 32'hFFFF_FFFF
I would like to check if the write strobe correct? Should write strobe be 32'hF800_0000 (for an awaddr: 32'h8C00_101b)? If 32'hFFFF_FFFF is a correct write strobe, which are the byte addresses that it covers.
Also, would like to check if it is permitted to have a write strobe patterns such as these 32'hAAAA_5555, or 32'hCDA5_0321. Basically, I am trying to check if we can have any pattern on the write strobe or does it have to be have to be a multiple of 2 (which always represents a contiguous set of valid byte lanes)?