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Announcements Mentor (a Siemens Business) at Arm DevSummit 2020
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Mentor (a Siemens Business) at Arm DevSummit 2020

Mike Santarini
Mike Santarini
September 21, 2020

Mentor, a Siemens business is proud to be a sponsor of and participant in the Arm® DevSummit, held October 6 through 8. Visit our virtual booth to watch some exciting videos, and have a live chat with Mentor technical experts from 9:30 AM-1:00 PM (PDT) every day of the show.

Mentor is also participating in several sessions during Arm DevSummit, find out more below.

Sponsored Session:

Hypervisor vs. Multicore Framework: Which is better for your design?

Wednesday, October 7 from 11:20 AM-11:50 AM PDT

Multicore embedded systems are becoming increasingly common. The most popular software architecture is Asymmetric MultiProcessing (AMP), where each core runs its own operating system or may have no OS at all. Such systems generally need some overall supervisory software that provides control of boot order and inter-core communication and security. There are broadly two options: a hypervisor or a multicore framework, such as those based on the OpenAMP standard. This session explores the characteristics of these two approaches and outlines their pros and cons, leading to guidance on making a choice.

Technical Tack Sessions:

Digital Twin for the Development of Autonomous Ready Systems

Tuesday, October 6 from 9:30 AM-10:00 AM PDT

Developing safe, secure, reliable fully autonomous vehicles requires a great deal more than just training algorithms in a compute farm. Siemens and Arm have partnered together to address these challenges from architecture definition to software development, and together are ushering in a more cost effective and shorter time-to-market approach to the next-generation of automotive platform.

Cloud-Based Automated SoC Design for an Intelligent Sensor

Wednesday, October 7 from 10:10 AM-10:40 AM PDT

As AI-fueled applications requiring real-world physical data drive the demand for application-specific intelligent sensors, new methods to cost-effectively accelerate the development of these ASICs will be needed. The talk will walk-through a real-world use case for developing an ASIC utilizing automated design generation based on SoC templates through a community cloud-based platform.

Developing an Arm Co-Processor With High-Level Synthesis

Wednesday, October 7 from 10:50 AM-11:20 AM PDT

This session will walk through the creation of a co-processor that computes a SHA-256 hash. It will show the hardware and software integration to Arm’s Corstone-201 IoT reference platform. The co-processor will be profiled and optimized, identifying and addressing bottlenecks in both hardware and software. We will compare performance, power, and area for the different implementations.

We hope to chat with you at the show. Stay safe!

Anonymous
  • Audreanne
    Offline Audreanne 2 months ago

     Thanks for the step by step tutorial. Works like a charm! myaarpmedicare.com

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