Can the AHB-Lite has 2 cycle read transfer at Address phase and Data phase?

Dear All.

I found that AHB-lite basic read transfer waveform as the below

and my AHB-LITE READ Transfer waveform is the below

My problem is that when I do read transfer from slave, AHB-Lite has 2 cycle read transfer both at address phase and data phase as the below.

Can the AHB-Lite has 2 cycle read transfer at Address phase and Data phase like above?  If can, what signals do I make sure?