Arm DesignStart is enhancing the Cortex-A5 package to help custom chip designers to expand market opportunities and develop richer experiences. The new package helps to reduce the development time of Arm-based Linux-capable chips. Designers can now take advantage of the fast simulation models of the CPU with a pre-validated, configurable reference (subsystem) design to reduce device complexity and speed-up software development.
Cortex-A5 DesignStart offers an easy and low-cost route to license the processor and a comprehensive IP package for custom System on Chip design. The Arm Cortex-A5 processor is the smallest application processor in the Cortex-A family. This allows you to meet performance, power, and area requirements for cost-sensitive, low-power applications. It is ideal for designing high-performance, feature-rich SoCs for embedded and IoT applications. The processor has an integrated Memory Management Unit (MMU), so can run rich operating systems, such as Linux.
But how can you get a head start on software development for your custom SoC before your silicon is ready?
Arm's Fixed Virtual Platform (FVP) for Cortex-A5 DesignStart is now available for developers to start early exploration and software development ahead of silicon availability. The same software can then be ported onto the silicon later, speeding up time to deployment.
An FVP is prebuilt simulation model that is constructed of Arm Fast Models. Fast Models are the Programmer’s View (PV) models of Arm IP. PV is an abstract representation of a system that provides a functionally accurate simulation of the modeled IP while running at fast simulation speeds. The Fast Models provide a foundation for Arm and partners to develop virtual platforms. The virtual platforms are then used by partners to develop, debug, and analyze the software for target design. This can be done before committing the design to silicon. Developing software in parallel with the hardware reduces the design cycle time and risk, speeding up time to market. The Fast Model for a processor, such as the Cortex-A5 used in this system, runs at tens or hundreds of millions of instructions per second – enabling software developers to be productive.
Although the FVP has a fixed composition and cannot be modified by the end user, it can be used to explore the extensive range of parameters and options available to configure the platform.
The FVP for Cortex-A5 DesignStart models the Cortex-A5 subsystem and peripherals as shown in the following diagram:
The FVP adds some utility components that are outside the hardware specification to aid in development. For example, an interface to the host workstation mouse/keyboard and display for interacting with the model. FVPs are typically simpler to deploy and provide more flexible and comprehensive debug and trace when compared to hardware alternatives. The Cortex-A5 DesignStart includes debug and trace APIs. Debuggers – such as Arm Development Studio – and trace tools can be attached through these interfaces to control simulation and provide powerful software debug and analysis capabilities.
The FVP for Cortex-A5 DesignStart is available for download from the Arm Developer website for 1-year evaluation. It runs on Windows (7 and 10) and Linux (Red Hat or Ubuntu) hosts.
The FVP for Cortex-A5 DesignStart is tailored to work with a suite of ready-to-use software.
Software Stack on the FVP for Cortex-A5 DesignStart
Importantly the software includes Arm Trusted Firmware, U-Boot, and a minimal Linux configuration (based on BusyBox), all ported to the Cortex-A5 platform and up-streamed to Github. A getting started guide is provided. This outlines the steps necessary to build the software stack and run it on the FVP.
The FVP and associated software stack provide simple-to-use, out-of-the-box experience for software development for Cortex-A5 DesignStart. This is often sufficient for most purposes. However, Cortex-A5 DesignStart supports extension through adding custom peripherals, memories, and other IP. You may want to extend the FVP to add models for the extensions so (for example) you can develop, test, and debug drivers for those peripherals.
To do this, you can use the full version of Fast Models, which you can evaluate for 30 days. We plan to supply the source for the DesignStart FVP as an example project within Fast Models. The example project can be easily edited to customize the platform, for example, adding the models for the extension blocks. Then, the project is built using the System Generator tool in Fast Models to create a custom FVP. Similarly, the software can be modified to include the drivers for custom IP. A Fast Models license is required for this customization.
Also, coming soon: a Cycle Model for the Cortex-A5 DesignStart. Cycle Models are 100% cycle-accurate models of the Arm IP created by translation from the RTL, which enables architecture exploration and IP sizing, for example, with DesignStart this could be used to compare performance with different numbers of processors in the Cortex-A5 cluster, different L2 cache sizes.
The DesignStart program enables designers to develop and deploy Linux-capable devices simply and efficiently. The modeling solutions enable productive software development for the Cortex-A5 DesignStart and enable designers to quickly define the optimal IP configuration.
Get the FVP for Cortex-A5 DesignStart