Arm DesignStart now includes the Arm Cortex-M0 and Cortex-M3 processors, with no upfront license fee. This will inspire more embedded designers, start-ups and OEMs to design their own custom SoC. To make it easier, we’ve provided a range of resources to support DesignStart and help developers succeed. They include:
Developers can access the Arm Cortex-M0 and Arm Cortex-M3 documentation, including the RTL and FPGA Testbench User Guides, Quickstart Guides and Customization Guides.
Check out these useful video tutorials: Prototype your custom chip with Cortex-M3 DesignStart Eval, Run a simple C test on RTL simulation with Cortex-M3 DesignStart Eval, Debug your RTL design with Cortex-M3 and Prototype and debug on FPGA Cortex-M3 DesignStart Eval.
Ask questions, share ideas and learn from others interested in DesignStart by joining the free DesignStart forum.
Learn direct from an Arm experienced engineer by attending an Arm training course. Courses cover topics including: Cortex-M0 and Cortex-M3 hardware, Cortex-M0 and M3 (Armv7M) software, and Systems (combined hardware and software). The courses are either private classroom, public virtual classroom or online and are available in a range of formats. See the full range of training courses.
Arm Support, a global team of highly qualified Arm engineers, offer round-the-clock online and email support. You’ll get a rapid response, plus access to our online case tracking tool. Get in touch with the team for more information. Contact Arm support.
If you’d like somebody to design a custom SoC for you, we can help turn your ideas into reality in partnership with our Arm Approved network of design houses. We offer design advice, assistance with specifications, access to a trusted network of design houses and if you’re not sure what you need, we can help you select the best design partner for your needs. Find out more.
We now offer a DesignStart RTL review which can help verify your SoC design and reduce risk before tape out. The review can help to spot any issues with signal connectivity, memory system arrangement, system performance, debug system and clock and power domains. After the review you’ll get a detailed report within two weeks.