Enhance your product with industry-leading processors – for no upfront license fee

The appeal of intelligence in everyday products is driving the demand for smart sensors and smart analog SoCs (system-on-chips). This demand is fuelling the expansion of custom chips (custom SoCs) that bring a host of benefits, such as reduced components costs, additional functionality, and product differentiation.

It has never been easier or more cost effective to begin your custom chip journey with the enhanced Arm DesignStart - the fastest, easiest route to evaluate and commercialize custom chips - now with the Arm Cortex-M3 and its verified subsystem, expanded support and $0 upfront license fee to design and commercialize without risk.

Accessing proven, trusted IP has never been easier

Cortex-M0, Cortex-M3 and subsystems available at designstart.arm.com

The DesignStart webinar recording and slides

Last week we ran two webinars (see Q&A below!) on how Arm DesignStart can help you get to a custom SoC faster and easier, so you can “Enhance your product with industry-leading processors – for no upfront license fee.” Big thanks to Graham Cunningham, Principal Applications Engineer at Arm, and @Phil Burr, Senior product manager at Arm, for presenting the content and fielding the Q&A.

Graham and Phil covered the new features of Arm DesignStart (additional processor IP, new CoreLink SDK-100 system design kit, system IP and design support). They did a deep-dive on the newly-added Cortex-M3 processor and the capabilities of the CoreLink SSE-050 subsystem.

If you’re looking to differentiate your product, reduce component costs, or increase your functionality with a custom SoC – don’t miss out on this webinar!

Watch the webinar Download the slides

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Technical Q&A from the live webinar

• Is the DesignStart Eval compatible with heterogeneous multi-core design, e.g. Cortex-M0 with Cortex-M3?
• Could you recommend a specific FPGA board for Arm Cortex-M0 and Cortex-M3 implementation?
• Are DesignStart Pro royalties based on the number of cores instantiated in single chip? if so, what about permanent lockstep configurations?
• Do you have data for area and power consumption of M0 in 0.13LP and 0.18LP technology?
• If I am an individual how can I apply for this program and get a prototype?
• Fab costs prohibit many start-ups and small companies to pursue custom SoC development. Does Arm have any plans to help companies on this, maybe with some fab partners similar to the design partners?
• Can the DesignStart Eval RTL project provided be modified? For example, to add new ports or remove unused ones for customization.
• The Cortex-M0 and Cortex-M3 processors are free for FPGA prototyping, but are they also free for IC prototyping?
• Is there any documentation for design implementation on Arm Keil software?
• What ASIL level can be achieved with the Cortex-M3 processor?
• For IoT implementation, which is better: the Cortex-M0 or Cortex-M3 - and why?
• We are looking to build a new FPU.  Can we get hooks to build this FPU in to the SoC?
• What are the approximate numbers for gates required for a Cortex-M0 and Cortex-M3 CPU?
• Will there be tutorials, videos that explain more details on the design process? Is there a possibility of simulation/test for effectiveness?
• Does the Cortex-M0 include any security options?
• Are the CoreSight Debug components made available through DesignStart as well?
• What is the maximum running frequency for Cortex-M3 on TSMC 40nm process?

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