This discussion has been locked.
You can no longer post new replies to this discussion. If you have a question you can start a new discussion

hello!我有个问题关于ARM Artisan UMC28nm L28HPCP memory power management。在手册中介绍了power up和power down的sequence,规定了VDDCE和VDDPE的上电和下电顺序。在标准power up的过程中,是不是一定要VDDCE早上电于VDDPE?我们现在设计是把VDDCE和VDDPE接到一起的,这种设计有没有问题? 另外,这个手册的Table1-3中,前三行VDDPE列中写的VDDCE,这个是否有误?

ARM Artisan UMC28nm L28HPCP memory power managemsequencesequenceent

Parents
  • 以下使我得到的回复,供你参考:

    There is no functional/timing issue if VDDPE and VDDCE are shorted. Only residual impact would be that the power saving retention modes will not be available.

Reply
  • 以下使我得到的回复,供你参考:

    There is no functional/timing issue if VDDPE and VDDCE are shorted. Only residual impact would be that the power saving retention modes will not be available.

Children