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在ARM M0+内核中的halt指令是什么?

大家好,我是使用arm系列芯片的新手,具体使用的是飞思卡尔kea8系列芯片,原来一直使用ti dsp 2000系列的,在ti 2000系列当中,有这样的语句:

   // Next two lines for debug only to halt the processor here
   // Remove after inserting ISR Code
   asm ("      ESTOP0");
   for(;;);

这样的语句用于非法进入的探测是非常有用的,那么请问在ARM M0+内核中的halt指令是什么?

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  • In Cortex-M0+, you can use BKPT instruction to make CPU halt. But you need to set DHCSR.C_DEBUGEN bit 1 to enable the halting debug if you want to halt CPU by BKPT. If DHCSR.C_DEBUGEN is low, BKPT will generate an exception as the CPU is in monitor mode.

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  • In Cortex-M0+, you can use BKPT instruction to make CPU halt. But you need to set DHCSR.C_DEBUGEN bit 1 to enable the halting debug if you want to halt CPU by BKPT. If DHCSR.C_DEBUGEN is low, BKPT will generate an exception as the CPU is in monitor mode.

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