This white paper is an introduction to porting existing code to the A64 instruction set supported by Armv8-A processors like the Cortex-A53 and Cortex-A57 from Arm. It will also be useful for those writing new code for these platforms.
It seems that is a question with many answers! For some, it will be the need to address more than 4GB of memory, for others the need for wider registers and greater accuracy of 64-bit data processing, for still others the attraction of a larger register set.
Whatever your reason for looking to move to 64-bit, it is likely that you will have a body of legacy software which will need porting as well as new code which needs writing. This paper is designed to help with both processes.
We’ll start with a quick look at the evolution of the Arm architecture which has brought 64-bit to reality.
Download whitepaper
I have doubt on "Structure padding" you explained in this document.
"In LP64, it has size 20. The ”long” has increased from 4 bytes and 8 bytes and must now be double-word aligned. This introduces four bytes of padding between the end of the first ”int” and the ”long”."
If this structure need to be double-word aligned, then its size must be 24 not 20 ? In my opinion,padding will be required for both int, unless we re-ordered structure definition.
struct foo {
int a;
int x;
long l;
}
In above case size will be 16 bytes?
could you pl.comment ??