Last week I was at the 51st DAC in San Francisco.  As I write that first line, it struck me that this was the 30th anniversary of the first DAC I attended in Albuquerque.  During the Conference I crossed paths with many colleagues that have been around as long as I have: if I had a dollar for each one that commented on how the event had changed over the years, I might have been able to afford a beer at the hotel.  Just.

 

My impression was that the Conference was as strong and vibrant as ever but that the associated trade show has declined in impact and relevance.  Companies are no longer sending large delegations as much of the information they need is available online: definitely not the case when I first attended.

 

This year, I presented in the Monday Tutorial sessions and the Designer Track as well as manning the Fast Models demo pod.  The theme for the presentations was "Hybrid Virtual Platforms", i.e. an environment where a programmer's view Virtual Platform (or Prototype) is connected to an emulator (e.g. Cadence's Palladium XP) to create a simulation environment for an SoC.  This is gaining acceptance amongst our partners, several of whom - including CSR and NVidia - presented on how and why they are adopting the solution.   The subject is heavily featured in  Frank Schirrmeister's recent blog from DAC.

 

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The author "in action" at the Cadence Theater, DAC 2014.

 

The Fast Models demo focused on trace, debug and analysis.  Assuming that the basic requirements(*) for a Virtual Platform have been met, the demos showed how the platform is leveraged to extract and display information on the execution.

 

Tracing Fast Models in ARM DS-5

 

Part of the demo showed how can the model developer's knowledge of (for example) a peripheral be used to build test harnesses that quickly provide feedback that the software is using the IP as expected.  In this example, we are using the Fast Model Python interface to attach a script that checks whether the LCD Controller in our example platform has correctly been set up by the software application running on the Virtual Platform.

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Results of checking the CLCD setup in the Virtual Platform

 

This methodology is particularly useful when working with complex peripheral IP such as MMUs, GICs and cache coherent interconnects and results from the experience gained in supporting partners getting started with ARMv8 designs..

 

We got a good response to this demo and we plan to follow up with more details in webinars/workshops later in the year and at ARM Techcon in October.

 

(*) fast, accurate, complete models of the required IP.