Google's Project Ara, the so-called "Lego" smartphone architecture unveiled in April, means intriguing new design options and opportunity for IP providers in the near term and raises profound questions for open-source hardware in the long term.
If you missed the buzz, here's some background: Project Ara, which was initiated at Motorola Mobility, uses the MIPI Alliance UniPro and M-PHY protocols as the backbone for a modular electronics architecture inside a smartphone "endoskeleton." Using electro permanent magnets (they don't need a permanent charge to keep the bond), designers and consumers can affix various functional modules to build a customized smartphone--say one with special radios or more powerful imagers or other sensors.
"Designs will have to be done modularly to work with the endoskeleton of the phone," said Arif Khan, product marketing director with Cadence. "Modules will need to play nice with each other, but if you can get it to work, the ideas and opportunities could be limitless."
MIPI UniPro is a multilayer protocol designed to enable the tunneling of multiple communications protocols within the system. Layer 1/1.5 include the M-PHY and PHY adapter; Layer 2, the data link layer for error correction, among other features; Layer 3 includes ID-based switching; Layer 4 is the transport layer interface to the application.
UniPro's Unique Opportunity
David Rutledge, chief technologist at Lattice whose FPGAs are being leveraged in the Project Ara Mobile Development Kit, as--among other things--the low-power programmable interface for UniPro, said:
"Project ARA is using (Lattice FPGAs) exactly as intended: high-speed communications of multiple protocols in an extremely low-power device. Ara is a good application of the technology, and it's exactly why UniPro was built. I think this is a major endorsement of the UniPro standard."
Khan said that for semiconductor makers, Project Ara will be about building chips that will be low power and work over the endoskeleton using the MIPI M-PHY and UniPro stack to communicate. At the same time, there is still the challenge of adapting the UniPort (UniPro + M-PHY) to be used with the adapter/connectors. However, beyond the use of UniPro for just the UFS and CSI-3 protocols, this is a great statement of the intended use for UniPro - a unified protocol bus, he added.
"Chip designers will need to understand the implications of using UniPro for system connectivity," he said. "As this is not widely used as yet, there will be a learning curve."
Some UniPro resources include:
- UniPro Specification Brief
- UniPro specification page
- UniPro Wikipedia Page Update
- MIPI Alliance Wikipedia Page
- Project Ara Website
- Module Developers Kit (MDK)
Project Ara also raises intriguing design questions both near and long term.
Expanding IP Opportunity
On the IP front, it likely means renewed interest in MIPI and other IP, soft and hard, Khan said. If the module market takes off, the number of design starts will rise, potentially leading to increased IP consumption. "IP makers will renew their commitment to the mobile chip space with increased emphasis on low-power designs and technology," he added.
On the hardware front, consider the role of either an FPGA or an ASIC as part of the design. Paul Eremenko, head of Project Ara, who spoke at the developers conference April 15, described two variants his team examined, one design FPGA-based, the other ASIC-based.
Using the Motorola RAZR MAXX HD as a baseline, Eremenko showed FPGA and ASICs variants that were larger in size, weight, and power consumption:
Moto. RAZR MAXX
"Taking that (design) to a custom variant, with custom ASICs, we can shrink the modularity penalty down to about a quarter of the size, weight, and power consumption as compared to a traditional tightly integrated device," Eremenko said.
Lattice's Rutledge, however, sees plenty of opportunity for makers of small-size, low-power FPGAs since each module contains a standard interface to the backplane:
"On one side is MIPI UniPro. On the other side is the module developer's playground. Who knows what they're going to want to do? It's a perfect place to allow people to innovate. It's an ideal opportunity for FPGAs."
One of the most intriguing questions surrounding Project Ara is the notion of open hardware architectures, applied on a broader scale. Open hardware to date has largely been confined to the "Maker" market through platforms such as Arduino and Raspberry Pi.
Khan sees potential but also challenges:
"Open hardware implies that there is no phone maker per se but an endoskeleton maker and module makers. This might seem interesting, but system compatibility challenges remain. One of the issues in the Android world is the fragmentation of the OS and customization done to it by various OEMs."
He added that in an open hardware platform, engineers are going to have to consider module compatibility with the other devices throughout system and OS upgrades:
"Anyone who has run into device driver issues after OS upgrades on a Windows system will know how challenging that is. This may make the phone brand meaningless per se, but it's more than likely that a single phone maker may build an endoskeleton and a line of modules that are optimized to run with it."
The longer term implications of such an open hardware platform could be significant. Imagine, for example, the modularity philosophy ported to design in the Internet of Things or automotive design and so forth.
Lattice's Rutledge said we're seeing it already. A device teardown may identify a number of ICs in a given smartphone, but they're really modules, he said.
"They're pre-built systems in an SIP that provide dedicated functionality--WiFi, antenna management, or touchscreen management modules. People don't recognize that," he said.
"The module ecosystem is developing like the IP ecosystem, and over time different standards will evolve," Rutledge added.